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» Encoding Algorithms for Logic Synthesis
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CAV
2006
Springer
164views Hardware» more  CAV 2006»
15 years 3 months ago
Allen Linear (Interval) Temporal Logic - Translation to LTL and Monitor Synthesis
The relationship between two well established formalisms for temporal reasoning is first investigated, namely between Allen's interval algebra (or Allen's temporal logic,...
Grigore Rosu, Saddek Bensalem
ISPD
2003
ACM
88views Hardware» more  ISPD 2003»
15 years 5 months ago
Synthesis and placement flow for gain-based programmable regular fabrics
In this paper we present the Gain-based Logic Block Array (GLA), a new via-programmable regular fabric. GLA is an array of Gainbased Logic Blocks (GLBs). The GLB is a semi-univers...
Bo Hu, Hailin Jiang, Qinghua Liu, Malgorzata Marek...
FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
15 years 5 months ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
ICCAD
1996
IEEE
119views Hardware» more  ICCAD 1996»
15 years 3 months ago
An algorithm for synthesis of system-level interface circuits
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
Ki-Seok Chung, Rajesh K. Gupta, C. L. Liu
DAC
2005
ACM
16 years 20 days ago
A new canonical form for fast boolean matching in logic synthesis and verification
? An efficient and compact canonical form is proposed for the Boolean matching problem under permutation and complementation of variables. In addition an efficient algorithm for co...
Afshin Abdollahi, Massoud Pedram