395 search results - page 73 / 79 » Encoding Algorithms for Logic Synthesis |
CAV
2009
Springer
15 years 10 months ago
2009
Springer
We present the key ideas in the design and implementation of Beaver, an SMT solver for quantifier-free finite-precision bit-vector logic (QF BV). Beaver uses an eager approach, enc...
85
Voted
ASYNC
2005
IEEE
15 years 3 months ago
2005
IEEE
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
102
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FMCAD
1998
Springer
15 years 1 months ago
1998
Springer
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
88
Voted
ESCIENCE
2007
IEEE
15 years 1 months ago
2007
IEEE
Data sources, storage, computing resources and services are entities on Grids that require mechanisms for publication and lookup. A discovery service relies on efficient lookup to...
124
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EEF
2000
15 years 1 months ago
2000
Both the logic and the stochastic analysis of discrete-state systems are hindered by the combinatorial growth of the state space underlying a high-level model. In this work, we con...