395 search results - page 9 / 79 » Encoding Algorithms for Logic Synthesis |
GLVLSI
2006
IEEE
15 years 3 months ago
2006
IEEE
Most of the logic synthesis algorithms are not scalable for large networks and, for this reason, partitioning is often applied. However traditional mincut-based partitioning techn...
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
We propose an algorithm for efficient threshold network synthesis of arbitrary multi-output Boolean functions. The main purpose of this work is to bridge the wide gap that currentl...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
This paper describes a scalable, technology-independent algorithm for the synthesis of approximate logic circuits. A low overhead, non-intrusive solution for concurrent error dete...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
Timing closure problems occur when timing estimates computed during logic synthesis do not match with timing estimates computed from the layout of the circuit. In such a situation...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...