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ASPLOS
2011
ACM
14 years 10 months ago
Hybrid NOrec: a case study in the effectiveness of best effort hardware transactional memory
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such a...
Luke Dalessandro, François Carouge, Sean Wh...
ASPLOS
2012
ACM
14 years 2 months ago
Path-exploration lifting: hi-fi tests for lo-fi emulators
Processor emulators are widely used to provide isolation and instrumentation of binary software. However they have proved difficult to implement correctly: processor specificati...
Lorenzo Martignoni, Stephen McCamant, Pongsin Poos...
PERCOM
2009
ACM
16 years 7 months ago
Multi-Event Handlers for Sensor-Driven Ubiquitous Computing Applications
Abstract--We propose an extension to the event-based programming model for sensor-driven ubiquitous computing applications. The extension consists of three abstractions: MultiEvent...
Sean Reilly
HPCA
2008
IEEE
16 years 6 months ago
Thread-safe dynamic binary translation using transactional memory
Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application...
JaeWoong Chung, Michael Dalton, Hari Kannan, Chris...
ICFP
2005
ACM
16 years 6 months ago
AtomCaml: first-class atomicity via rollback
We have designed, implemented, and evaluated AtomCaml, an extension to Objective Caml that provides a synchronization primitive for atomic (transactional) execution of code. A fir...
Michael F. Ringenburg, Dan Grossman