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» Encoding Program Executions
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133
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CODES
2008
IEEE
15 years 9 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
140
Voted
RTSS
2006
IEEE
15 years 8 months ago
MCGREP - A Predictable Architecture for Embedded Real-Time Systems
Real-time systems design involves many important choices, including that of the processor. The fastest processors achieve performance by utilizing architectural features that make...
Jack Whitham, Neil C. Audsley
132
Voted
CASES
2006
ACM
15 years 8 months ago
Adapting compilation techniques to enhance the packing of instructions into registers
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
Stephen Hines, David B. Whalley, Gary S. Tyson
CGO
2005
IEEE
15 years 8 months ago
Maintaining Consistency and Bounding Capacity of Software Code Caches
Software code caches are becoming ubiquitous, in dynamic optimizers, runtime tool platforms, dynamic translators, fast simulators and emulators, and dynamic compilers. Caching fre...
Derek Bruening, Saman P. Amarasinghe
120
Voted
CODES
2005
IEEE
15 years 8 months ago
Future wireless convergence platforms
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
C. John Glossner, Mayan Moudgill, Daniel Iancu, Ga...