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DATE
2008
IEEE
165views Hardware» more  DATE 2008»
15 years 8 months ago
Dynamic Round-Robin Task Scheduling to Reduce Cache Misses for Embedded Systems
Modern embedded CPU systems rely on a growing number of software features, but this growth increases the memory footprint and increases the need for efficient instruction and data...
Ken W. Batcher, Robert A. Walker
83
Voted
DATE
2008
IEEE
89views Hardware» more  DATE 2008»
15 years 8 months ago
Software Protection Mechanisms for Dependable Systems
We expect that in future commodity hardware will be used in safety critical applications. But the used commodity microprocessors will become less reliable because of decreasing fe...
Ute Wappler, Martin Muller
DSN
2008
IEEE
15 years 8 months ago
A fault-tolerant directory-based cache coherence protocol for CMP architectures
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Ricardo Fernández Pascual, José M. G...
111
Voted
ECRTS
2008
IEEE
15 years 8 months ago
Predictable Code and Data Paging for Real Time Systems
There is a need for using virtual memory in real-time applications: using virtual addressing provides isolation between concurrent processes; in addition, paging allows the execut...
Damien Hardy, Isabelle Puaut
ICASSP
2008
IEEE
15 years 8 months ago
Address assignment sensitive variable partitioning and scheduling for DSPS with multiple memory banks
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
Chun Jason Xue, Tiantian Liu, Zili Shao, Jingtong ...