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CGO
2003
IEEE
15 years 7 months ago
Addressing Mode Selection
Many processor architectures provide a set of addressing modes in their address generation units. For example DSPs (digital signal processors) have powerful addressing modes for e...
Erik Eckstein, Bernhard Scholz
94
Voted
DATE
2003
IEEE
94views Hardware» more  DATE 2003»
15 years 7 months ago
Reducing Power Consumption for High-Associativity Data Caches in Embedded Processors
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
HICSS
2003
IEEE
127views Biometrics» more  HICSS 2003»
15 years 7 months ago
Storage Model for CDA Documents
The Health Level 7 Clinic Document Architecture (CDA) is an XML-based document markup standard that specifies the hierarchical structure and semantics of “clinical documents” ...
Zheng Liang, Peter Bodorik, Michael Shepher
HICSS
2003
IEEE
200views Biometrics» more  HICSS 2003»
15 years 7 months ago
A Dynamic Assignment Problem in a Mobile System with Limited Bandwidth
The assignment problem originally arising from parallel and distributed computing has been investigated intensively since the 70’s when Harold Stone proposed a method to solve i...
Yang Wang 0006, Thomas Kunz
ICPP
2003
IEEE
15 years 7 months ago
Enabling Partial Cache Line Prefetching Through Data Compression
Hardware prefetching is a simple and effective technique for hiding cache miss latency and thus improving the overall performance. However, it comes with addition of prefetch buff...
Youtao Zhang, Rajiv Gupta