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ICPP
1998
IEEE
15 years 6 months ago
Supporting Software Distributed Shared Memory with an Optimizing Compiler
To execute a shared memory program efficiently, we have to manage memory consistency with low overheads, and have to utilize communication bandwidth of the platform as much as pos...
Tatsushi Inagaki, Junpei Niwa, Takashi Matsumoto, ...
IPPS
1998
IEEE
15 years 6 months ago
Code Transformations for Low Power Caching in Embedded Multimedia Processors
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...
Chidamber Kulkarni, Francky Catthoor, Hugo De Man
ISCA
1998
IEEE
123views Hardware» more  ISCA 1998»
15 years 6 months ago
Weak Ordering - A New Definition
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory ac...
Sarita V. Adve, Mark D. Hill
LCN
1998
IEEE
15 years 6 months ago
High Performance Integrated Network Communications Architecture (INCA)
Current communication subsystem mechanisms within workstation and PC class computers are limiting network communications throughput to a small percentage of the present network da...
Klaus Schug, Anura P. Jayasumana, Prasanth Gopalak...
RTAS
1998
IEEE
15 years 6 months ago
Bounding Loop Iterations for Timing Analysis
Static timing analyzers need to know the minimum and maximum number of iterations associated with each loop in a real-time program so accurate timing predictions can be obtained. ...
Christopher A. Healy, Mikael Sjödin, Viresh R...