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FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
15 years 8 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
CASES
2001
ACM
15 years 8 months ago
Patchable instruction ROM architecture
Increased systems level integration has meant the movement of many traditionally off chip components onto a single chip including a processor, instruction storage, data path, and ...
Timothy Sherwood, Brad Calder
IWANN
1995
Springer
15 years 8 months ago
EL-SIM: a Development Environment for Neuro-Fuzzy Intelligent Controllers
1 This paper presents a new technique for the design of real-time controllers based on a hybrid approach which integrates several control strategies, such as intelligent controlle...
Marcello Chiaberge, G. Di Bene, S. Di Pascoli, R. ...
GECCO
2010
Springer
157views Optimization» more  GECCO 2010»
15 years 8 months ago
Speeding up the evaluation of evolutionary learning systems using GPGPUs
In this paper we introduce a method for computing fitness in evolutionary learning systems based on NVIDIA’s massive parallel technology using the CUDA library. Both the match ...
María A. Franco, Natalio Krasnogor, Jaume B...
ATAL
2008
Springer
15 years 7 months ago
AGENTFLY: a multi-agent airspace test-bed
The contribution presents a multi-agent technology in the domain of the air-traffic control of several autonomous aerial vehicles (manned as well as unmanned). The system has been...
David Sislák, Premysl Volf, Stepán K...