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IEEESCC
2010
IEEE
15 years 8 months ago
Towards a Unified Service Description Language for the Internet of Services: Requirements and First Developments
Service-oriented Architectures (SOA) and Web services leverage the technical value of solutions in the areas of distributed systems and cross-enterprise integration. The emergence...
Jorge Cardoso, Alistair Barros, Norman May, Uwe Ky...
EXPCS
2007
15 years 8 months ago
An analysis of XML compression efficiency
XML simplifies data exchange among heterogeneous computers, but it is notoriously verbose and has spawned the development of many XML-specific compressors and binary formats. We p...
Christopher J. Augeri, Dursun A. Bulutoglu, Barry ...
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
15 years 8 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
ICCTA
2007
IEEE
15 years 8 months ago
Register Sharing Verification During Data-Path Synthesis
The variables of the high-level specifications and the automatically generated temporary variables are mapped on to the data-path registers during data-path synthesis phase of hig...
Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sa...
GLVLSI
2009
IEEE
113views VLSI» more  GLVLSI 2009»
15 years 8 months ago
Reducing parity generation latency through input value aware circuits
1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...