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102
Voted
ETS
2011
IEEE
220views Hardware» more  ETS 2011»
14 years 6 days ago
Structural In-Field Diagnosis for Random Logic Circuits
—In-field diagnosability of electronic components in larger systems such as automobiles becomes a necessity for both customers and system integrators. Traditionally, functional ...
Alejandro Cook, Melanie Elm, Hans-Joachim Wunderli...
100
Voted
GLVLSI
2002
IEEE
98views VLSI» more  GLVLSI 2002»
15 years 5 months ago
Minimizing concurrent test time in SoC's by balancing resource usage
We present a novel test scheduling algorithm for embedded corebased SoC’s. Given a system integrated with a set of cores and a set of test resources, we select a test for each c...
Dan Zhao, Shambhu J. Upadhyaya, Martin Margala
94
Voted
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 6 months ago
A Heuristic for Concurrent SOC Test Scheduling with Compression and Sharing
1-The increasing cost for System-on-Chip (SOC) testing is mainly due to the huge test data volumes that lead to long test application time and require large automatic test equipmen...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
127
Voted
ISSRE
2000
IEEE
15 years 4 months ago
Criteria for Testing Polymorphic Relationships
The emphasis in object-oriented programs is on defining abstractions that have both state and behavior. This emphasis causes a shift in focus from software units to the way softw...
Roger T. Alexander, A. Jefferson Offutt
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
15 years 7 months ago
Test architecture design and optimization for three-dimensional SoCs
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
Li Jiang, Lin Huang, Qiang Xu