Sciweavers

124 search results - page 18 / 25
» Energy Efficient Deadline Scheduling in Two Processor System...
Sort
View
ICDCS
1995
IEEE
15 years 1 months ago
Analysis of Resource Lower Bounds in Real-Time Applications
Tasks in a real-time application usually have several stringent timing, resource, and communication requirements. Designing a distributed computing system which can meet all these...
Raed Alqadi, Parameswaran Ramanathan
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
15 years 9 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
ISLPED
2010
ACM
158views Hardware» more  ISLPED 2010»
14 years 9 months ago
Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach
The ongoing scaling of semiconductor technology is causing severe increase of on-chip power density and temperature in microprocessors. This has raised urgent requirement for both...
Weixun Wang, Xiaoke Qin, Prabhat Mishra
ICALP
2009
Springer
15 years 4 months ago
Improved Bounds for Speed Scaling in Devices Obeying the Cube-Root Rule
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
Nikhil Bansal, Ho-Leung Chan, Kirk Pruhs, Dmitriy ...
HPCA
2001
IEEE
15 years 9 months ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas