124 search results - page 18 / 25 » Energy Efficient Deadline Scheduling in Two Processor System... |
132
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ICDCS
1995
IEEE
15 years 3 months ago
1995
IEEE
Tasks in a real-time application usually have several stringent timing, resource, and communication requirements. Designing a distributed computing system which can meet all these...
103
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VLSID
2002
IEEE
16 years 1 days ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
ISLPED
2010
ACM
14 years 12 months ago
2010
ACM
The ongoing scaling of semiconductor technology is causing severe increase of on-chip power density and temperature in microprocessors. This has raised urgent requirement for both...
ICALP
2009
Springer
15 years 6 months ago
2009
Springer
Speed scaling is a power management technique that involves dynamically changing the speed of a processor. This gives rise to dualobjective scheduling problems, where the operating...
HPCA
2001
IEEE
16 years 22 hour ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...