Sciweavers

114 search results - page 12 / 23
» Energy-efficient FPGA interconnect design
Sort
View
FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
15 years 1 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev
FPL
2008
Springer
126views Hardware» more  FPL 2008»
14 years 11 months ago
Customized Reconfigurable Interconnection Networks for multiple application SOCS
A Customized Reconfigurable Interconnection Network (CRIN) refers to a minimal switching network, yielding routing solutions for any element in a pre-given set of routing requirem...
Hongbing Fan, Jason Ernst, Yu-Liang Wu
INTEGRATION
2008
183views more  INTEGRATION 2008»
14 years 9 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
95
Voted
ARC
2007
Springer
169views Hardware» more  ARC 2007»
15 years 3 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
CF
2004
ACM
15 years 3 months ago
The happy marriage of architecture and application in next-generation reconfigurable systems
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
Ingrid Verbauwhede, Patrick Schaumont