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» Energy-efficient FPGA interconnect design
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SLIP
2005
ACM
15 years 3 months ago
A 3-D FPGA wire resource prediction model validated using a 3-D placement and routing tool
The interconnection architecture of FPGAs such as switches dominates performance of FPGAs. Three-dimensional integration of FPGAs overcomes interconnect limitations by allowing in...
Young-Su Kwon, Payam Lajevardi, Anantha P. Chandra...
FPGA
2003
ACM
120views FPGA» more  FPGA 2003»
15 years 2 months ago
Architecture evaluation for power-efficient FPGAs
This paper presents a flexible FPGA architecture evaluation framework, named fpgaEVA-LP, for power efficiency analysis of LUT-based FPGA architectures. Our work has several contri...
Fei Li, Deming Chen, Lei He, Jason Cong
ASPDAC
2005
ACM
149views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Leakage control in FPGA routing fabric
Abstract— As FPGA designs in 65nm are being explored, reducing leakage power becomes an important design issue. A significant portion of the FPGA leakage is expended in the unus...
Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykr...
FPGA
2008
ACM
161views FPGA» more  FPGA 2008»
14 years 11 months ago
Implementing high-speed string matching hardware for network intrusion detection systems
This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
Atul Mahajan, Benfano Soewito, Sai K. Parsi, Ning ...
FCCM
2006
IEEE
131views VLSI» more  FCCM 2006»
15 years 3 months ago
Packet Switched vs. Time Multiplexed FPGA Overlay Networks
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...
Nachiket Kapre, Nikil Mehta, Michael DeLorimier, R...