17 search results - page 1 / 4 » Energy-efficient dynamic circuit design in the presence of c... |
67
Voted
ISLPED
1999
ACM
15 years 1 months ago
1999
ACM
DAC
2005
ACM
15 years 10 months ago
2005
ACM
As Si CMOS devices are scaled down into the nanoscale regime, current computer architecture approaches are reaching their practical limits. Future nano-architectures will confront...
101
click to vote
DAC
2003
ACM
15 years 10 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
—The dynamic programmable logic array (PLA) style has become popular in designing high-performance microprocessors because of its high speed and predictable routing delay. Howeve...
ICCAD
1998
IEEE
15 years 1 months ago
1998
IEEE
Presented in this paper are 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy...