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78
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ISLPED
2000
ACM
77views Hardware» more  ISLPED 2000»
15 years 4 months ago
A recursive algorithm for low-power memory partitioning
Memory-processor integration o ers new opportunities for reducing the energy of a system. In the case of embedded systems, one solution consists of mapping the most frequently acc...
Luca Benini, Alberto Macii, Massimo Poncino
104
Voted
TC
1998
14 years 11 months ago
Performance Evaluation and Cost Analysis of Cache Protocol Extensions for Shared-Memory Multiprocessors
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
Fredrik Dahlgren, Michel Dubois, Per Stenströ...
108
Voted
CODES
2001
IEEE
15 years 3 months ago
Compiler-directed selection of dynamic memory layouts
Compiler technology is becoming a key component in the design of embedded systems, mostly due to increasing participation of software in the design process. Meeting system-level ob...
Mahmut T. Kandemir, Ismail Kadayif
92
Voted
IJHPCA
2007
116views more  IJHPCA 2007»
14 years 11 months ago
Parallel Languages and Compilers: Perspective From the Titanium Experience
We describe the rationale behind the design of key features of Titanium—an explicitly parallel dialect of JavaTM for high-performance scientific programming—and our experienc...
Katherine A. Yelick, Paul N. Hilfinger, Susan L. G...
106
Voted
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
15 years 3 months ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...