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ITC
2003
IEEE
120views Hardware» more  ITC 2003»
15 years 3 months ago
High Quality ATPG for Delay Defects
: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...
Puneet Gupta, Michael S. Hsiao
84
Voted
MEMOCODE
2003
IEEE
15 years 3 months ago
MoDe: A Method for System-Level Architecture Evaluation
System-level design methodologies for embedded HW/SW systems face several challenges: In order to be susceptible to systematic formal analysis based on state-space exploration, a ...
Jan Romberg, Oscar Slotosch, Gabor Hahn
METRICS
2003
IEEE
15 years 3 months ago
A Metrics Suite for Measuring Reusability of Software Components
In component-based software development, it is necessary to measure the reusability of components in order to realize the reuse of components effectively. There are some product m...
Hironori Washizaki, Hirokazu Yamamoto, Yoshiaki Fu...
PADS
2003
ACM
15 years 3 months ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper
UIST
2003
ACM
15 years 3 months ago
User interface continuations
Dialog boxes that collect parameters for commands often create ephemeral, unnatural interruptions of a program’s normal execution flow, encouraging the user to complete the dial...
Dennis Quan, David Huynh, David R. Karger, Robert ...