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CODES
2004
IEEE
15 years 10 months ago
Tuning SoC platforms for multimedia processing: identifying limits and tradeoffs
We present a analytical framework to identify the tradeoffs and performance impacts associated with different SoC platform configurations in the specific context of implementing m...
Alexander Maxiaguine, Yongxin Zhu, Samarjit Chakra...
CODES
2004
IEEE
15 years 10 months ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
CODES
2004
IEEE
15 years 10 months ago
Facilitating reuse in hardware models with enhanced type inference
High-level hardware modeling is an essential, yet time-consuming, part of system design. However, effective component-based reuse in hardware modeling languages can reduce model c...
Manish Vachharajani, Neil Vachharajani, Sharad Mal...
CODES
2006
IEEE
15 years 10 months ago
Automatic phase detection for stochastic on-chip traffic generation
During System on Chip (SoC) design, Network on Chip (NoC) prototyping is used for adapting NoC parameters to the application running on the chip. This prototyping is currently don...
Antoine Scherrer, Antoine Fraboulet, Tanguy Risset
PASTE
1998
ACM
15 years 10 months ago
Efficient Composite Data Flow Analysis Applied to Concurrent Programs
FLAVERS, a tool for verifying properties of concurrent systems, uses composite data flow analysis to incrementally improve the precision of the results of its verifications. Altho...
Gleb Naumovich, Lori A. Clarke, Leon J. Osterweil