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PEPM
2009
ACM
17 years 18 hour ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
VIS
2005
IEEE
165views Visualization» more  VIS 2005»
16 years 1 months ago
High Dynamic Range Volume Visualization
High resolution volumes require high precision compositing to preserve detailed structures. This is even more desirable for volumes with high dynamic range values. After the high ...
Baoquan Chen, David H. Porter, Minh X. Nguyen, Xia...
DAC
2008
ACM
16 years 27 days ago
Multithreaded simulation for synchronous dataflow graphs
Synchronous dataflow (SDF) has been successfully used in design tools for system-level simulation of wireless communication systems. Modern wireless communication standards involv...
Chia-Jui Hsu, José Luis Pino, Shuvra S. Bha...
DAC
2006
ACM
16 years 26 days ago
Efficient simulation of critical synchronous dataflow graphs
Simulation and verification using electronic design automation (EDA) tools are key steps in the design process for communication and signal processing systems. The synchronous dat...
Chia-Jui Hsu, José Luis Pino, Ming-Yung Ko,...
WWW
2009
ACM
16 years 17 days ago
XQuery in the browser
Since the invention of the Web, the browser has become more and more powerful. By now, it is a programming and execution environment in itself. The predominant language to program...
Ghislain Fourny, Markus Pilman, Daniela Florescu, ...
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