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ISCA
1998
IEEE
125views Hardware» more  ISCA 1998»
15 years 1 months ago
Active Pages: A Computation Model for Intelligent Memory
Microprocessors and memory systems su er from a growing gap in performance. We introduce Active Pages, a computation model which addresses this gap by shifting data-intensive comp...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
DATE
2004
IEEE
159views Hardware» more  DATE 2004»
15 years 1 months ago
Compositional Memory Systems for Data Intensive Applications
To alleviate the system performance unpredictability of multitasking applications running on multiprocessor platforms with shared memory hierarchies we propose a task level set ba...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
DAC
1999
ACM
15 years 10 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 3 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
ICRA
2008
IEEE
172views Robotics» more  ICRA 2008»
15 years 4 months ago
Robot navigation using a sparse distributed memory
— Despite all the progress that has been made in Robotics and Artificial Intelligence, traditional approaches seem unsuitable to build truly intelligent robots, exhibiting human...
Mendes Mendes, Manuel Marques Crisóstomo, A...