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» Environment for Multiprocessor Simulator Development
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ASPDAC
2010
ACM
150views Hardware» more  ASPDAC 2010»
14 years 8 months ago
Post-silicon debugging for multi-core designs
Escaped errors in released silicon are growing in number due to the increasing complexity of modern processor designs and shrinking production schedules. Worsening the problem are ...
Valeria Bertacco
GLOBECOM
2008
IEEE
15 years 4 months ago
Characterizing Indoor Wireless Channels via Ray Tracing, and Validation via Measurements
Abstract—We investigate the reliability of radio channel simulators in capturing the important properties of radio channels throughout a well-specified environment. Indoor envir...
Aliye Özge Kaya, Larry J. Greenstein, Wade Tr...
IJVR
2006
178views more  IJVR 2006»
14 years 10 months ago
Scene Synchronization in Close Coupled World Representations Using SCIVE
This paper introduces SCIVE, a Simulation Core for Intelligent Virtual Environments. SCIVE provides a Knowledge Representation Layer (KRL) as a central organizing struc...
Marc Erich Latoschik, Christian Fröhlich, Ale...
ISCA
2003
IEEE
104views Hardware» more  ISCA 2003»
15 years 3 months ago
Token Coherence: Decoupling Performance and Correctness
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
Milo M. K. Martin, Mark D. Hill, David A. Wood
CASES
2001
ACM
15 years 1 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...