313 search results - page 21 / 63 » Error Correction Based on Verification Techniques |
ASE
2004
14 years 9 months ago
2004
The verification of concurrent systems through an exhaustive traversal of the state space suffers from the infamous state-space-explosion problem, caused by the many interleavings ...
SIGGRAPH
1999
ACM
15 years 1 months ago
1999
ACM
We introduce a new concept for accelerating realistic image synthesis algorithms. At the core of this procedure is a novel physical error metric that correctly predicts the percep...
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DFT
2003
IEEE
15 years 2 months ago
2003
IEEE
We describe a method for designing fault tolerant circuits based on an extension of a Concurrent Error Detection (CED) technique. The proposed extension combines parity check code...
100
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FMICS
2006
Springer
15 years 1 months ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
APPROX
2009
Springer
15 years 4 months ago
2009
Springer
The area of derandomization attempts to provide efficient deterministic simulations of randomized algorithms in various algorithmic settings. Goldreich and Wigderson introduced a n...