1534 search results - page 23 / 307 » Error Reporting Logic |
CAISE
2009
Springer
15 years 1 months ago
2009
Springer
Despite the abundance of analysis techniques to discover control-flow errors in workflow designs, there is hardly any support for w verification. Most techniques simply abstract fr...
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
DSN
2008
IEEE
14 years 11 months ago
2008
IEEE
The combination of continued technology scaling and increased on-chip transistor densities has made vulnerability to radiation induced soft errors a significant design concern. In...
ITC
1999
IEEE
15 years 2 months ago
1999
IEEE
A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
ICCD
1992
IEEE
15 years 2 months ago
1992
IEEE
ct Digital's NVAX high-performance microprocessor has a complex logical design. A rigorous simulation-based verification effort was undertaken to ensure that there were no log...