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DFT
2002
IEEE
103views VLSI» more  DFT 2002»
15 years 2 months ago
Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies
Concurrent error detection (CED) methods are typically employed to provide an indication of the operational health of synchronous circuits during normal functionality. Existing CE...
Thomas Verdel, Yiorgos Makris
DATE
2006
IEEE
151views Hardware» more  DATE 2006»
15 years 4 months ago
Designing MRF based error correcting circuits for memory elements
As devices are scaled to the nanoscale regime, it is clear that future nanodevices will be plagued by higher soft error rates and reduced noise margins. Traditional implementation...
Kundan Nepal, R. Iris Bahar, Joseph L. Mundy, Will...
BMCBI
2011
14 years 4 months ago
Errors in CGAP xProfiler and cDNA DGED: the importance of library parsing and gene selection algorithms
Background: The Cancer Genome Anatomy Project (CGAP) xProfiler and cDNA Digital Gene Expression Displayer (DGED) have been made available to the scientific community over a decade...
Andrew T. Milnthorpe, Mikhail Soloviev
ADL
1997
Springer
125views Digital Library» more  ADL 1997»
15 years 2 months ago
Error Tolerant Document Structure Analysis
Successful applications of digital libraries require structured access to sources of information. This paper presents an approach to extract the logical structure of text document...
Bertin Klein, Peter Fankhauser
JOLPE
2010
97views more  JOLPE 2010»
14 years 8 months ago
Low-Power Soft Error Hardened Latch
This paper presents a low-power soft error-hardened latch suitable for reliable circuit operation. The proposed circuit uses redundant feedback loop to protect latch against soft e...
Hossein Karimiyan Alidash, Vojin G. Oklobdzija