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PATMOS
2005
Springer
15 years 3 months ago
A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers
A new method for predicting timing jitter caused by device noise in current-mode logic (CML) frequency dividers is presented. Device noise transformation into jitter is modeled as ...
Marko Aleksic, Nikola Nedovic, K. Wayne Current, V...
ICNP
1998
IEEE
15 years 2 months ago
Improving Wireless LAN Performance via Adaptive Local Error Control
Wireless links can exhibit high error rates due to attenuation, fading, or interfering active radiation sources. To make matters worse, error rates can be highly variable due to c...
David A. Eckhardt, Peter Steenkiste
ESWS
2009
Springer
15 years 4 months ago
Ontology Integration Using Mappings: Towards Getting the Right Logical Consequences
Abstract. We propose a general method and novel algorithmic techniques to facilitate the integration of independently developed ontologies using mappings. Our method and techniques...
Ernesto Jiménez-Ruiz, Bernardo Cuenca Grau,...
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
15 years 4 months ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu
BIRTHDAY
2004
Springer
15 years 3 months ago
Pure Type Systems in Rewriting Logic: Specifying Typed Higher-Order Languages in a First-Order Logical Framework
Abstract. The logical and operational aspects of rewriting logic as a logical framework are tested and illustrated in detail by representing pure type systems as object logics. Mor...
Mark-Oliver Stehr, José Meseguer