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84
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JAPLL
2007
86views more  JAPLL 2007»
15 years 14 days ago
Using logical relevance for question answering
We propose a novel method of determining the appropriateness of an answer to a question through a proof of logical relevance rather than a logical proof of truth. We define logic...
Marco De Boni
105
Voted
FPGA
2005
ACM
105views FPGA» more  FPGA 2005»
15 years 6 months ago
Soft error rate estimation and mitigation for SRAM-based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
92
Voted
DATE
2009
IEEE
202views Hardware» more  DATE 2009»
15 years 7 months ago
Design as you see FIT: System-level soft error analysis of sequential circuits
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
Daniel Holcomb, Wenchao Li, Sanjit A. Seshia
105
Voted
IOLTS
2008
IEEE
102views Hardware» more  IOLTS 2008»
15 years 7 months ago
Integrating Scan Design and Soft Error Correction in Low-Power Applications
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
87
Voted
SIGCSE
2008
ACM
150views Education» more  SIGCSE 2008»
15 years 14 days ago
Backstop: a tool for debugging runtime errors
The errors that Java programmers are likely to encounter can roughly be categorized into three groups: compile-time (semantic and syntactic), logical, and runtime (exceptions). Wh...
Christian Murphy, Eunhee Kim, Gail E. Kaiser, Adam...