We propose a novel method of determining the appropriateness of an answer to a question through a proof of logical relevance rather than a logical proof of truth. We define logic...
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs. Soft error rate (SER) estimation is a crucial step in the design of soft error tole...
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
The errors that Java programmers are likely to encounter can roughly be categorized into three groups: compile-time (semantic and syntactic), logical, and runtime (exceptions). Wh...
Christian Murphy, Eunhee Kim, Gail E. Kaiser, Adam...