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FPGA
2001
ACM
139views FPGA» more  FPGA 2001»
15 years 2 months ago
A memory coherence technique for online transient error recovery of FPGA configurations
The partial reconfiguration feature of some of the currentgeneration Field Programmable Gate Arrays (FPGAs) can improve dependability by detecting and correcting errors in onchip ...
Wei-Je Huang, Edward J. McCluskey
ICALP
2009
Springer
15 years 10 months ago
High Complexity Tilings with Sparse Errors
Abstract. Tile sets and tilings of the plane appear in many topics ranging from logic (the Entscheidungsproblem) to physics (quasicrystals). The idea is to enforce some global prop...
Bruno Durand, Andrei E. Romashchenko, Alexander Sh...
DATE
2002
IEEE
154views Hardware» more  DATE 2002»
15 years 2 months ago
Low Power Error Resilient Encoding for On-Chip Data Buses
As technology scales toward deep submicron, on-chip interconnects are becoming more and more sensitive to noise sources such as power supply noise, crosstalk, radiation induced ef...
Davide Bertozzi, Luca Benini, Giovanni De Micheli
GECCO
2007
Springer
215views Optimization» more  GECCO 2007»
15 years 1 months ago
Finding safety errors with ACO
Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulae on the program variables. Most model checke...
Enrique Alba, J. Francisco Chicano
ICDE
1999
IEEE
107views Database» more  ICDE 1999»
15 years 11 months ago
Using Codewords to Protect Database Data from a Class of Software Errors
Increasingly, for extensibility and performance, specialpurpose application code is being integrated with database system code. Such application code has direct access to database...
Philip Bohannon, Rajeev Rastogi, S. Seshadri, Abra...