Sciweavers

1534 search results - page 79 / 307
» Error Reporting Logic
Sort
View
ITC
2000
IEEE
123views Hardware» more  ITC 2000»
15 years 2 months ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey
ESSCIRC
2011
93views more  ESSCIRC 2011»
13 years 9 months ago
12% Power reduction by within-functional-block fine-grained adaptive dual supply voltage control in logic circuits with 42 volta
— Within-functional-block fine-grained adaptive dual supply voltage control (FADVC) is proposed to reduce the power of CMOS logic circuits. Both process and design variations wi...
Atsushi Muramatsu, Tadashi Yasufuku, Masahiro Nomu...
76
Voted
ESOP
2010
Springer
15 years 7 months ago
Faulty Logic: Reasoning about Fault Tolerant Programs
Transient faults are single-shot hardware errors caused by high energy particles from space, manufacturing defects, overheating, and other sources. Such faults can be devastating f...
Matthew L. Meola and David Walker
81
Voted
ML
2008
ACM
150views Machine Learning» more  ML 2008»
14 years 10 months ago
Learning probabilistic logic models from probabilistic examples
Abstract. We revisit an application developed originally using Inductive Logic Programming (ILP) by replacing the underlying Logic Program (LP) description with Stochastic Logic Pr...
Jianzhong Chen, Stephen Muggleton, José Car...
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
15 years 3 months ago
Modeling Noise Transfer Characteristic of Dynamic Logic Gates
Dynamic noise analysis is recently gaining more attention as a definitive method to overcome glaring deficiencies of static noise analysis. Exact dynamic noise analysis requires...
Li Ding 0002, Pinaki Mazumder