381 search results - page 33 / 77 » Error-Correcting Codes in Steganography |
DFT
2009
IEEE
15 years 6 months ago
2009
IEEE
Hybrid CMOS/non-CMOS memories, in short hybrid memories, have been lauded as future ultra-capacity data memories. Nonetheless, such memories are going to suffer from high degree o...
ICASSP
2011
IEEE
14 years 3 months ago
2011
IEEE
This paper proposes a novel algorithm for decoding real-field codes over erroneous channels, where the encoded message is corrupted by sparse errors, i.e., impulsive noise. The m...
105
click to vote
VLSID
2005
IEEE
15 years 5 months ago
2005
IEEE
In this paper, we have proposed a design technique for the reversible circuit of Binary Coded Decimal (BCD) adder. The proposed circuit has the ability to add two 4bits binary var...
MICRO
2010
IEEE
14 years 9 months ago
2010
IEEE
As technology scaling poses a threat to DRAM scaling due to physical limitations such as limited charge, alternative memory technologies including several emerging non-volatile me...
TIT
2008
14 years 11 months ago
2008
In this paper, we propose a new class of low-rate error correction codes called repeat-zigzag-Hadamard (RZH) codes featuring simple encoder and decoder structures, and flexible cod...