The need for low-power, small factor secondary storage device has led to the widespread use of flash memory in embedded systems. The energy consumption of processor and flash base...
In this paper, an instruction-level energy model is proposed for the data-path of very long instruction word (VLIW) pipelined processors that can be used to provide accurate power ...
Abstract— In the context of a design space exploration framework for supporting the platform-based design approach, we address the problem of robustness with respect to manufactu...
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...