142 search results - page 23 / 29 » Estimating Energy Consumption for an MPSoC Architectural Exp... |
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Efficient energy and performance estimation of embedded software is a critical part of any system-level design flow. Macromodeling based estimation is an attempt to speed up estim...
HPCA
2008
IEEE
15 years 10 months ago
2008
IEEE
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
ISLPED
2005
ACM
15 years 3 months ago
2005
ACM
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
HPCA
2002
IEEE
15 years 10 months ago
2002
IEEE
This paper explores the role of branch predictor organization in power/energy/performance tradeoffs for processor design. We find that as a general rule, to reduce overall energy ...