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DATE
2004
IEEE
105views Hardware» more  DATE 2004»
15 years 1 months ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...
DAC
2006
ACM
15 years 10 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
96
Voted
SAMOS
2004
Springer
15 years 2 months ago
High-Level Energy Estimation for ARM-Based SOCs
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
DATE
2005
IEEE
107views Hardware» more  DATE 2005»
15 years 3 months ago
Exploring NoC Mapping Strategies: An Energy and Timing Aware Technique
Complex applications implemented as Systems on Chip (SoCs) demand extensive use of system level modeling and validation. Their implementation gathers a large number of complex IP ...
César A. M. Marcon, Ney Laert Vilar Calazan...
77
Voted
VLSI
2007
Springer
15 years 3 months ago
Fast estimation of software energy consumption using IPI(Inter-Prefetch Interval) energy model
In this paper, we present the way of fast and accurate estimation of software energy consumption in off-the-shelf processor using IPI(Inter-Prefetch Interval) energy model. In ou...
Jungsoo Kim, Kyungsu Kang, Heejun Shim, Woong Hwan...