Parasitic extraction techniques are used to estimate signal delay in VLSI chips. Inductance extraction is a critical component of the parasitic extraction process in which on-chip ...
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
Lilian Bossuet, Wayne Burleson, Guy Gogniat, Vikas...
Rate control plays a very important role in constant bit rate (CBR) coding. AVC standard is jointly developed by ISO and ITU-T, which contains several inter and intra prediction m...
This paper reports work to support dependability arguments about the future reliability of a product before there is direct empirical evidence. We develop a method for estimating ...
In this paper we introduce a novel graphical image representation comprising a single curve—the one-liner. The first step involves the detection and linking of image edges. We ...
Vadim Makhervaks, Gill Barequet, Alfred M. Bruckst...