The recent past has seen a tremendous increase in the size of design circuits that can be implemented in a single FPGA. These large design sizes significantly impact cycle time du...
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
Giovanni Beltrame, Carlo Brandolese, William Forna...
This paper describes hardware methods, a lightweight and platform-independent scheme for linking real-time Java code to co-processors implemented using a hardware description lang...
Multi-observer segmentation evaluation is useful in the imaging community. We have developed a web-based software application for automatic performance evaluation of multiple imag...
Yaoyao Zhu, Xiaolei Huang, Daniel P. Lopresti, L. ...
This paper proposes a new visual modeling environment for embedded component systems that improves the productivity of application developers. This embedded component system decre...