Sciweavers

1548 search results - page 286 / 310
» Estimating Software Vulnerabilities
Sort
View
IPPS
2006
IEEE
15 years 3 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
ISPASS
2006
IEEE
15 years 3 months ago
Modeling TCAM power for next generation network devices
Applications in Computer Networks often require high throughput access to large data structures for lookup and classification. Many advanced algorithms exist to speed these searc...
Banit Agrawal, Timothy Sherwood
ISPASS
2006
IEEE
15 years 3 months ago
Simulation sampling with live-points
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
Thomas F. Wenisch, Roland E. Wunderlich, Babak Fal...
IUI
2006
ACM
15 years 3 months ago
A hybrid learning system for recognizing user tasks from desktop activities and email messages
The TaskTracer system seeks to help multi-tasking users manage the resources that they create and access while carrying out their work activities. It does this by associating with...
Jianqiang Shen, Lida Li, Thomas G. Dietterich, Jon...
CGO
2005
IEEE
15 years 3 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...