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» Estimating design time for system circuits
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CODES
2004
IEEE
15 years 3 months ago
Analytical models for leakage power estimation of memory array structures
There is a growing need for accurate power models at the system level. Memory structures such as caches, Branch Target Buffers (BTBs), and register files occupy significant area i...
Mahesh Mamidipaka, Kamal S. Khouri, Nikil D. Dutt,...
ICC
2007
IEEE
155views Communications» more  ICC 2007»
15 years 6 months ago
Capacity Achieving Pilot Design for MIMO-OFDM over Time-Varying Frequency-Selective Channels
— In this paper1 we analyze the capacity of MIMOOFDM systems that utilize pilot symbols to acquire estimation of the radio channel at the receiver. An analytical framework is dev...
Ivan Cosovic, Gunther Auer
ASPDAC
2007
ACM
86views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Fast Buffered Delay Estimation Considering Process Variations
- Advanced process technologies impose more significant challenges especially when manufactured circuits exhibit substantial process variations. Consideration of process variations...
Tien-Ting Fang, Ting-Chi Wang
DAC
2005
ACM
15 years 1 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
SIGMOD
2007
ACM
108views Database» more  SIGMOD 2007»
15 years 12 months ago
Travel time estimation using NiagaraST and latte
To address increasing traffic congestion and its associated consequences, traffic managers are turning to intelligent transportation management. The latte project is extending dat...
Kristin Tufte, Jin Li, David Maier, Vassilis Papad...