Sciweavers

710 search results - page 42 / 142
» Estimating design time for system circuits
Sort
View
DAC
2005
ACM
16 years 24 days ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
COMPSAC
2008
IEEE
15 years 1 months ago
Decision Support for User Interface Design: Usability Diagnosis by Time Analysis of the User Activity
This paper presents a methodology for setting up a Decision Support system for User Interface Design (DSUID). We first motivate the role and contributions of DSUID and then demons...
Avi Harel, Ron S. Kenett, Fabrizio Ruggeri
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
15 years 3 months ago
Software Performance Estimation in MPSoC Design
- Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-...
Márcio Oyamada, Flávio Rech Wagner, ...
DATE
2007
IEEE
97views Hardware» more  DATE 2007»
15 years 6 months ago
Estimating functional coverage in bounded model checking
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
Daniel Große, Ulrich Kühne, Rolf Drechs...
DAC
2004
ACM
16 years 24 days ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan