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» Estimating design time for system circuits
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VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
16 years 6 days ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...
DAC
2005
ACM
16 years 24 days ago
MP core: algorithm and design techniques for efficient channel estimation in wireless applications
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timoth...
CODES
1998
IEEE
15 years 4 months ago
Software timing analysis using HW/SW cosimulation and instruction set simulator
Timing analysis for checking satisfaction of constraints is a crucial problem in real-time system design. In some current approaches, the delay of software modules is precalculate...
Jie Liu, Marcello Lajolo, Alberto L. Sangiovanni-V...
GLVLSI
2005
IEEE
144views VLSI» more  GLVLSI 2005»
15 years 5 months ago
On-chip power distribution grids with multiple supply voltages for high performance integrated circuits
—On-chip power distribution grids with multiple supply voltages are discussed in this paper. Two types of interdigitated and paired power distribution grids with multiple supply ...
Mikhail Popovich, Eby G. Friedman, Michael Sotman,...
DAC
2005
ACM
16 years 24 days ago
Automatic scenario detection for improved WCET estimation
Modern embedded applications usually have real-time constraints and they are implemented using heterogeneous multiprocessor systems-on-chip. Dimensioning a system requires accurat...
Stefan Valentin Gheorghita, Sander Stuijk, Twan Ba...