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» Estimating design time for system circuits
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ISSS
1997
IEEE
128views Hardware» more  ISSS 1997»
15 years 3 months ago
Architectural Exploration and Optimization of Local Memory in Embedded Systems
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
JCP
2008
216views more  JCP 2008»
14 years 11 months ago
Design Overview Of Processor Based Implantable Pacemaker
Implantable pacemaker is a battery operated real time embedded system, which includes software/hardware codesign strategy. As it is placed within the heart by surgery, battery life...
Santosh D. Chede, Kishore D. Kulat
RTS
2002
177views more  RTS 2002»
14 years 11 months ago
Feedback Control Real-Time Scheduling: Framework, Modeling, and Algorithms
This paper presents a Feedback Control real-time Scheduling (FCS) framework for adaptive realtime systems. An advantage of the FCS framework is its use of feedback control theory ...
Chenyang Lu, John A. Stankovic, Sang Hyuk Son, Gan...
CODES
2009
IEEE
15 years 4 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
ISSS
1999
IEEE
151views Hardware» more  ISSS 1999»
15 years 4 months ago
Optimized System Synthesis of Complex RT Level Building Blocks from Multirate Dataflow Graphs
In order to cope with the ever increasing complexity of todays application specific integrated circuits, a building block based design methodology is established. The system is co...
Jens Horstmannshoff, Heinrich Meyr