Sciweavers

710 search results - page 66 / 142
» Estimating design time for system circuits
Sort
View
SENSYS
2005
ACM
15 years 5 months ago
Estimating clock uncertainty for efficient duty-cycling in sensor networks
Radio duty cycling has received significant attention in sensor networking literature, particularly in the form of protocols for medium access control and topology management. Whi...
Saurabh Ganeriwal, Deepak Ganesan, Hohyun Shim, Vl...
ICCAD
2006
IEEE
71views Hardware» more  ICCAD 2006»
15 years 8 months ago
Using CAD to shape experiments in molecular QCA
This paper examines how circuits and systems made from molecular QCA devices might function. Our design constraints are “chemically reasonable” in that we consider the charact...
Michael T. Niemier, Michael Crocker, Xiaobo Sharon...
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 5 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
GLVLSI
2010
IEEE
168views VLSI» more  GLVLSI 2010»
15 years 2 days ago
A revisit to voltage partitioning problem
We revisit voltage partitioning problem when the mapped voltages of functional units are predetermined. If energy consumption is estimated by formulation E = CV 2 , a published wo...
Tao Lin, Sheqin Dong, Bei Yu, Song Chen, Satoshi G...
DAC
2002
ACM
16 years 25 days ago
Component-based design approach for multicore SoCs
This paper presents a high-level component-based methodology and design environment for application-specific multicore SoC architectures. Component-based design provides primitive...
Ahmed Amine Jerraya, Amer Baghdadi, Damien Lyonnar...