710 search results - page 69 / 142 » Estimating design time for system circuits |
TVLSI
2010
14 years 6 months ago
2010
It has been recently demonstrated that digital signal processing systems may possibly leverage unconventional voltage overscaling (VOS) to reduce energy consumption while maintaini...
111
Voted
JCP
2007
14 years 11 months ago
2007
—This paper describes an Internet-based laboratory, named Remote Monitored and Controlled Laboratory (RMCLab) developed at University of Patras, Greece, for electrical engineerin...
103
click to vote
ICCAD
2006
IEEE
15 years 8 months ago
2006
IEEE
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
135
click to vote
ICDCS
1995
IEEE
15 years 3 months ago
1995
IEEE
Tasks in a real-time application usually have several stringent timing, resource, and communication requirements. Designing a distributed computing system which can meet all these...
ISORC
2000
IEEE
15 years 4 months ago
2000
IEEE
This paper deals with tolerance to timing faults in time-constrained systems. TAFT (Time Aware Fault-Tolerant) is a recently devised approach which applies tolerance to timing vio...