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» Estimating design time for system circuits
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DSN
2004
IEEE
15 years 3 months ago
A Framework for Evaluating Storage System Dependability
Designing storage systems to provide business continuity in the face of failures requires the use of various data protection techniques, such as backup, remote mirroring, point-in-...
Kimberly Keeton, Arif Merchant
VTC
2006
IEEE
142views Communications» more  VTC 2006»
15 years 5 months ago
Adaptive Bit-Interleaved Coded OFDM over Time-Varying Channels
When adapting the transmitter to the channel state information (CSI), improved transmission is possible compared to the open loop system where no CSI is provided at the transmitte...
Jin Soo Choi, Chang-Kyung Sung, Sung Hyun Moon, In...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
15 years 4 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
RTAS
2010
IEEE
14 years 10 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean
DAC
2006
ACM
16 years 26 days ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...