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» Estimating design time for system circuits
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ASPDAC
2005
ACM
132views Hardware» more  ASPDAC 2005»
15 years 1 months ago
Automatic synthesis and scheduling of multirate DSP algorithms
- To date, most high-level synthesis systems do not automatically solve present design problems, such as those related to timing associated with the physical implementation of mult...
Ying Yi, Mark Milward, Sami Khawam, Ioannis Nousia...
TSP
2010
14 years 6 months ago
Uplink synchronization in OFDMA spectrum-sharing systems
Spectrum sharing employs dynamic allocation of frequency resources for a more efficient use of the radio spectrum. Despite its appealing features, this technology inevitably compli...
Luca Sanguinetti, Michele Morelli, H. Vincent Poor
ISLPED
2003
ACM
83views Hardware» more  ISLPED 2003»
15 years 5 months ago
Leakage power modeling and optimization in interconnection networks
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...
Xuning Chen, Li-Shiuan Peh
ISLPED
2007
ACM
109views Hardware» more  ISLPED 2007»
15 years 1 months ago
A multi-model power estimation engine for accuracy optimization
RTL power macromodeling is a mature research topic with a variety of equation and table-based approaches. Despite its maturity, macromodeling is not yet widely accepted as an indu...
Felipe Klein, Guido Araujo, Rodolfo Azevedo, Rober...
PADS
2003
ACM
15 years 5 months ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper