Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing or routability. In this paper, we develop e cient wirelength estimation techniqu...
Andrew E. Caldwell, Andrew B. Kahng, Stefanus Mant...
High-level power estimation, when given only a high-level design specification such as a functional or RTL description, requires high-level estimation of the circuit average acti...
We study model selection strategies based on penalized empirical loss minimization. We point out a tight relationship between error estimation and data-based complexity penalizatio...
Video-rate registered range and intensity data are at reach of current sensor technology. This wealth of data can be pro tably exploited in order to estimate rigid motion paramete...
Luca Lucchese, Gianfranco Doretto, Guido M. Cortel...
This paper describes a novel approach to nd a tighter bound of the transformation of the Min-Max problems into the one of Least-Square Estimation. It is well known that the above ...