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ASPDAC
2008
ACM
115views Hardware» more  ASPDAC 2008»
15 years 4 months ago
An optimal algorithm for sizing sequential circuits for industrial library based designs
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Che...
COMPSAC
2008
IEEE
15 years 3 months ago
Decision Support for User Interface Design: Usability Diagnosis by Time Analysis of the User Activity
This paper presents a methodology for setting up a Decision Support system for User Interface Design (DSUID). We first motivate the role and contributions of DSUID and then demons...
Avi Harel, Ron S. Kenett, Fabrizio Ruggeri
AAAI
1996
15 years 3 months ago
Design and Implementation of a Replay Framework Based on a Partial Order Planner
In this paper we describe the design and implementation of the derivation replay framework, dersnlp+ebl (Derivational snlp+ebl), which is based within a partial order planner. der...
Laurie H. Ihrig, Subbarao Kambhampati
CORR
2008
Springer
125views Education» more  CORR 2008»
15 years 2 months ago
Cross-Layer Link Adaptation Design for Relay Channels with Cooperative ARQ Protocol
The cooperative automatic repeat request (C-ARQ) is a link layer relaying protocol which exploits the spatial diversity and allows the relay node to retransmit the source data pac...
Morteza Mardani, Jalil S. Harsini, Farshad Lahouti
JUCS
2007
114views more  JUCS 2007»
15 years 1 months ago
Design and Implementation of the AMCC Self-Timed Microprocessor in FPGAs
: The development of processors with full custom technology has some disadvantages, such as the time used to design the processors and the cost of the implementation. In this artic...
Susana Ortega-Cisneros, Juan Jóse Raygoza-P...