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» Evaluating E-Commerce Cluster Architectures Using Simulation
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IEEEHPCS
2010
14 years 8 months ago
Analytical modeling and evaluation of network-on-chip architectures
Network-on-chip (NoC) architectures adopted for Systemon-Chip (SoC) are characterized by different trade-offs between latency, throughput, communication load, energy consumption, ...
Suboh A. Suboh, Mohamed Bakhouya, Jaafar Gaber, Ta...
IEEESCC
2007
IEEE
15 years 3 months ago
A Fault-Tolerant Middleware Architecture for High-Availability Storage Services
Today organizations and business enterprises of all sizes need to deal with unprecedented amounts of digital information, creating challenging demands for mass storage and on-dema...
Sangeetha Seshadri, Ling Liu, Brian F. Cooper, Law...
FPGA
1999
ACM
115views FPGA» more  FPGA 1999»
15 years 1 months ago
Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
Alexander Marquardt, Vaughn Betz, Jonathan Rose
WSC
2008
14 years 12 months ago
A multi threaded and resolution approach to simulated futures evaluation
As part of the DARPA Deep Green efforts, SAIC developed a multi-threaded and resolution approach to constructing and evaluating simulated futures to address the SimPath component....
David R. Pratt, Robert W. Franceschini, Robert B. ...
PVM
2005
Springer
15 years 3 months ago
Calculation of Single-File Diffusion Using Grid-Enabled Parallel Generic Cellular Automata Simulation
Parallel execution of simulation runs has become indispensable in different research areas recently. One of the most promising and powerful models in science are cellular automata ...
Marcus Komann, Christian Kauhaus, Dietmar Fey