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EUROPAR
2010
Springer
15 years 3 months ago
Transactional Mutex Locks
Mutual exclusion locks limit concurrency but offer low latency. Software transactional memory (STM) typically has higher latency, but scales well. In this paper we propose transac...
Luke Dalessandro, David Dice, Michael L. Scott, Ni...
142
Voted
PLDI
2005
ACM
15 years 7 months ago
Mitosis compiler: an infrastructure for speculative threading based on pre-computation slices
Speculative parallelization can provide significant sources of additional thread-level parallelism, especially for irregular applications that are hard to parallelize by conventio...
Carlos García Quiñones, Carlos Madri...
95
Voted
HICSS
1998
IEEE
176views Biometrics» more  HICSS 1998»
15 years 6 months ago
Intelligent System for Reading Handwriting on Forms
The National Institute of Standards and Technology (NIST) has developed a form-based handprint recognition system for reading information written on forms. This public domain soft...
Michael D. Garris
CODES
2004
IEEE
15 years 5 months ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek
ERSA
2006
111views Hardware» more  ERSA 2006»
15 years 3 months ago
Promises and Pitfalls of Reconfigurable Supercomputing
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
Maya Gokhale, Christopher Rickett, Justin L. Tripp...