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LCTRTS
1998
Springer
15 years 6 months ago
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
Thomas Lundqvist, Per Stenström
109
Voted
ESTIMEDIA
2008
Springer
15 years 3 months ago
Serialized multitasking code generation from dataflow specification
This paper is concerned about multitasking embedded software development from the system specification to the final implementation including design space exploration(DSE). In the ...
Seongnam Kwon, Soonhoi Ha
CSSE
2002
IEEE
15 years 1 months ago
Characteristics of assured service and an alternative RIO scheme in differentiated services networks
Assured Service, a service model of Internet Differentiated Services (DiffServ) architecture, is not so well accommodated by the current Internet environment. This is because the I...
Seung-Joon Seok, Sung-Hyuck Lee, Jinwoo Park, Chul...
129
Voted
MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
14 years 11 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
SIGCOMM
2010
ACM
15 years 2 months ago
Topology-aware resource allocation for data-intensive workloads
This paper proposes an architecture for optimized resource allocation in Infrastructure-as-a-Service (IaaS)-based cloud systems. Current IaaS systems are usually unaware of the ho...
Gunho Lee, Niraj Tolia, Parthasarathy Ranganathan,...