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ARCS
2009
Springer
15 years 8 months ago
Evaluating CMPs and Their Memory Architecture
Abstract. Many-core processor architectures require scalable solutions that reflect the locality and power constraints of future generations of technology. This paper presents a CM...
Chris R. Jesshope, Mike Lankamp, Li Zhang
114
Voted
SYSTOR
2009
ACM
15 years 8 months ago
DHIS: discriminating hierarchical storage
A typical storage hierarchy comprises of components with varying performance and cost characteristics, providing multiple options for data placement. We propose and evaluate a hie...
Chaitanya Yalamanchili, Kiron Vijayasankar, Erez Z...
EMSOFT
2006
Springer
15 years 5 months ago
Compiler-assisted leakage energy optimization for clustered VLIW architectures
Miniaturization of devices and the ensuing decrease in the threshold voltage has led to a substantial increase in the leakage component of the total processor energy consumption. ...
Rahul Nagpal, Y. N. Srikant
DAC
2002
ACM
16 years 2 months ago
A flexible accelerator for layer 7 networking applications
In this paper, we present a flexible accelerator designed for networking applications. The accelerator can be utilized efficiently by a variety of Network Processor designs. Most ...
Gokhan Memik, William H. Mangione-Smith
BROADNETS
2005
IEEE
15 years 7 months ago
Modeling and performance evaluation of ISCSI storage area networks
Abstract— This paper provides a concise modeling and performance evaluation of the iSCSI storage area network (SAN) architecture and protocol. SANs play a key role in business co...
Christoph M. Gauger, Martin Köhn, Sebastian G...