417 search results - page 13 / 84 » Evaluating kilo-instruction multiprocessors |
FGCS
2006
14 years 10 months ago
2006
The choice of an interconnection network for a parallel computer depends on a large number of performance factors which are very often application dependent. We propose a performa...
ICPADS
1994
IEEE
1994
IEEE
Efficient Fault Tolerance: An Approach to Deal with Transient Faults in Multiprocessor Architectures
15 years 2 months ago
Dynamic error processing approaches are an important mechanism to increase the reliability in a multiprocessor system, while making efficient use of the available resources. To th...
ICCD
2007
IEEE
15 years 2 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
81
Voted
IPPS
1998
IEEE
15 years 2 months ago
1998
IEEE
We compare the performance of systems consisting of one large cluster containing q processors with systems where processors are grouped into k clusters containing u processors eac...
122
click to vote
ISCA
1995
IEEE
15 years 2 months ago
1995
IEEE
This paper introduces dynamic self-invalidation (DSI), a new technique for reducing cache coherence overhead in shared-memory multiprocessors. DSI eliminates invalidation messages...